Technical Field
The present invention generally relates to semiconductor structures and their fabrication. More particularly, the present invention relates to fabrication of semiconductor structures on silicon-on insulator (SOI) substrates in which the structures include isolated ohmic trenches and stand-alone isolation trenches.
Description of Related Art
In the fabrication of High Voltage Silicon on Insulator (HVSOI) semiconductor structures, in order to maintain standard Complementary Metal Oxide Semiconductor (CMOS) well implants and sufficient silicon (Si) for a laterally diffused metal oxide semiconductor (LDMOS) drift region, a relatively thick Si layer in a silicon-on-insulator (SOI) substrate is desired. For example, the final Si layer thickness may preferably be greater than 1 micrometer in an SOI substrate. However, in addition, in the same SOI substrate there is typically a need to have an ohmic electrical contact to bulk silicon (or “handle wafer”) from the Si surface of the SOI substrate. Furthermore, there can be a need for a plurality of ohmic trenches to contact a plurality of regions in the bulk silicon that may, or may not, be implanted and which need to be isolated from each other. Moreover, in order to ensure sufficient device-to-device isolation, such substrates also typically require an insulating trench. That is, an insulating trench which can provide appropriate ground rules device-to-device isolation of, for example, about 200 volts (VDC).